This invention relates generally to amplifying a high-frequency traveling wave.
As the operating frequencies of communication systems continue to increase, circuit designers face the challenge of creating circuits that are capable of handling these increased frequencies while maintaining the fidelity of traveling waves within the systems. Circuits operating at frequencies of 10 gigahertz (“GHz”) or less are generally designed using a lumped circuit design approach without encountering a significant sacrifice of bandwidth, noise performance, or stability. At such frequencies, the dimensions of an integrated circuit are typically small compared to the shortest wavelengths of the electrical signals amplified by the circuit. However, the input and output impedances of a circuit operating at a bit rate of 40 gigabits-per-second (“Gb/s”), for example, are less likely to be adequately matched using a lumped circuit design approach. The assumptions inherent in the lumped circuit design approach are generally insufficient to capture all of the parasitic effects that are likely to be realized at bit rates beyond approximately 10 Gb/s.
Numerous single-ended traveling wave and lumped circuit solutions have been proposed to take into account the parasitic effects typically associated with high frequency circuits. However, traveling wave amplifiers are usually inefficient and may consume a large amount of power. More specifically, single-ended traveling wave solutions are generally input signal level dependent and are often subject to power supply noise variations.
Lumped circuit solutions typically necessitate large devices to achieve high output power, current, and/or voltage. Large devices are inherently more difficult to incorporate into a higher frequency design, as compared to a design that operates at a frequency of 10 GHz or less. Moreover, the large devices generally consume a large amount of power.
Thus, there is a need for an improved way of amplifying a high-frequency traveling wave.